4 chipsatz, Enhanced c1 control [auto, Hardware prefetcher [enabled – Asus P5GV-MX Benutzerhandbuch

Seite 69: Adjacent cache line prefetch [enabled, Cpu internal thermal control [auto, Hyper-threading technology [enabled, Intel(r) speedstep technology [automatic

Advertising
4 chipsatz, Enhanced c1 control [auto, Hardware prefetcher [enabled | Adjacent cache line prefetch [enabled, Cpu internal thermal control [auto, Hyper-threading technology [enabled, Intel(r) speedstep technology [automatic | Asus P5GV-MX Benutzerhandbuch | Seite 69 / 94 4 chipsatz, Enhanced c1 control [auto, Hardware prefetcher [enabled | Adjacent cache line prefetch [enabled, Cpu internal thermal control [auto, Hyper-threading technology [enabled, Intel(r) speedstep technology [automatic | Asus P5GV-MX Benutzerhandbuch | Seite 69 / 94
Advertising