Asus P5V-VM DH - Handbuch (Seite 69)

ASUS P5VD2-MX/P5V-VM DH 2-21
CPU L1 & L2 Cache [Enabled]
Konfigurationsoptionen: [Disabled] [Enabled]
Select Menu
Item Specific Help
Phoenix-Award BIOS CMOS Setup Utility
Advanced
Chipset
DRAM Clock/Drive Control
Frequency/Voltage control
Top Performance [Disabled]
Primary Display Adapter [PCI-E]
VGA Share Memory Size [64M]
2.4.2 Chipset
DRAM Clock/Drive Control
Select Menu
Item Specific Help
Phoenix-Award BIOS CMOS Setup Utility
Advanced
DRAM Clock/Drive Control
Current DRAM Frequency 200MHz
DRAM Frequency
DRAM Timing Selectable [By SPD]
x CAS Latency Time 2.5
x Bank Interleave Disabled
x Precharge to Active(Trp) 4T
x Active to Precharge(Tras) 07T
x Active to CMD(Trcd) 4T
x REF to ACT/REF(Trfc) 20T/21T
x ACT(0) to ACT(1) (TRRD) 3T
Auto
DRAM Frequency [Auto]
Konfigurationsoptionen: [Auto] [400 MHz] [533 MHz]
DRAM Timing Selectable [By SPD]
Konfigurationsoptionen: [Manual] [By SPD]
Die folgenden Elemente sind nur vom Benutzer einstellbar, wenn das
Element “DRAM Timing Selectable” auf [Manual] gesetzt wurde.
CAS Latency Time [2.5]
Konfigurationsoptionen: [2] [2.5] [3]
Bank Interleave [Disabled]
Konfigurationsoptionen: [Disabled] [2 Bank] [4 Bank] [8 Bank]
Precharge to Active(Trp) [4T]
Konfigurationsoptionen: [2T] [3T] [4T] [5T]