Asus MAXIMUS V GENE - Handbuch (Seite 90)

3-10 Kapitel 3: BIOS setup
Kapitel 3
DRAM IO-L (CHB) [Auto]
Konfigurationsoptionen: [Auto] [Delay 1 Clock] �� [Delay 15 Clock] : [Auto] [Delay 1 Clock] – [Delay 15 Clock]
Third Timings
tWRDR (DD) [Auto]
Konfigurationsoptionen: [Auto] [1 DRAM Clock] �� [8 DRAM Clock] : [Auto] [1 DRAM Clock] – [8 DRAM Clock]
tRWDR (DD) [Auto]
Konfigurationsoptionen: [Auto] [1 DRAM Clock] �� [8 DRAM Clock] : [Auto] [1 DRAM Clock] – [8 DRAM Clock]
tRWSR [Auto]
Konfigurationsoptionen: [Auto] [1 DRAM Clock] �� [8 DRAM Clock] : [Auto] [1 DRAM Clock] – [8 DRAM Clock]
tRR (DD) [Auto]
Konfigurationsoptionen: [Auto] [1 DRAM Clock] �� [8 DRAM Clock]
tRR (DR) [Auto]
Konfigurationsoptionen: [Auto] [1 DRAM Clock] �� [8 DRAM Clock]
tRRSR [Auto]
Konfigurationsoptionen: [Auto] [4 DRAM Clock] �� [7 DRAM Clock]
tWW (DD) [Auto]
Konfigurationsoptionen: [Auto] [1 DRAM Clock] �� [8 DRAM Clock]
tWW (DR) [Auto]
Konfigurationsoptionen: [Auto] [1 DRAM Clock] �� [8 DRAM Clock]
tWWSR [Auto]
Konfigurationsoptionen: [Auto] [4 DRAM Clock] �� [7 DRAM Clock]
MISC
MRC Fast Boot [Enabled]
Konfigurationsoptionen: [Enabled] [Disabled]
DRAM CLK Period [Auto]
Konfigurationsoptionen: [Auto] [1] �� [14]
Transmitter Slew (CHA) [Auto]
Konfigurationsoptionen: [Auto] [1] �� [7]
Transmitter Slew (CHB) [Auto]
Konfigurationsoptionen: [Auto] [1] �� [7]
Receiver Slew (CHA) [Auto]
Konfigurationsoptionen: [Auto] [1] �� [7]
Receiver Slew (CHB) [Auto]
Konfigurationsoptionen: [Auto] [1] �� [7]